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Types of Jitter in Timing Systems 

Jitter is the timing variations of a set of signal edges from their ideal values. Jitter in clock signals is typically caused by noise or other disturbances in the system. Contributing factors include thermal noise, power supply variations, loading conditions, device noise, and interference coupled from nearby circuits.

 

 
 
Tags:  Differential Oscillator  clock generators  Silicon Oscillator  VCXO 
Views:  130
Published:  July 08, 2011
 
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Slide 1: Types of Jitter in Timing Systems Jitter is the timing variations of a set of signal edges from their ideal values. Jitter in clock signals is typically caused by noise or other disturbances in the system. Contributing factors include thermal noise, power supply variations, loading conditions, device noise, and interference coupled from nearby circuits. Jitter can be measured in a number of ways; the following are the major types of jitter: Period Jitter Period jitter is the deviation in cycle time of a clock signal with respect to the ideal period over a number of randomly selected cycles. Cycle to Cycle Period Jitter Cycle to cycle (C2C) jitter is defined in JEDEC Standard 65B as the variation in cycle time of a signal between adjacent cycles, over a random sample of adjacent cycle pairs. Long Term Jitter Long-term jitter measures the change in a clock’s output from the ideal position, over several consecutive cycles. The actual number of cycles used in the measurement is application dependent. Phase Jitter Phase noise is usually described as either a set of noise values at different frequency offsets (e.g., -60 dBc/Hz at 20KHz and -95 dBc/Hz at 10MHz), or as a continuous noise plot over a range of frequencies. Phase jitter is the integration of phase noises over a certain spectrum and expressed in seconds. Time Interval Error (TIE) Time Interval Error (TIE) of an edge is the time deviation of that edge from its ideal position measured from a reference point. The most common instrument used in measuring clock jitter is the real time digital oscilloscope. A good example for how jitter can be useful in clock generators is given below. A 3-PLL clock generator is a circuit that combines three PLLs within the same package, with the ability to generate independent clock frequencies from each of the PLLs. The jitter from each of these PLLs has to be low enough so that the integrated clock generator is usable, which means that the circuits have to be designed very carefully to minimize the causes of jitter (listed above). The other features of this 3-PLL clock generator includes, Integration of up to three oscillators, 1 differential oscillator and two single-ended. This provides more reliable designs and board space saving. It has frequency range of 1 to 220 MHz with 5 decimal places of accuracy. This allows designers to customize the product to their applications. Tight frequency tolerances. This provides high stability clock to increase the robustness of their designs. Learn more about :- Silicon Oscillator , VCXO & Voltage Controlled Oscillator

   
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